Semiconductor device processing involves etching a pattern from a layer of material or depositing a pattern of material over a different layer. Grating-type targets are often used in semiconductor device fabrication to measure errors in alignment and overlay of different layers.
A method for gain creation is based on the Moiré principle, where a grating on grating target is designed with close pitch values of the gratings. When, for example, the designed pitch values are unresolved, the only detectable signal has a very large pitch and results from interference between light scattered by both gratings. The main advantage of this approach is that it reduces many possible contributions to the tool-induced shift (TIS) budget by a gain factor.
There are certain disadvantages associated with the prior art Moiré approach. For example, this approach produces relatively low contrast since the signal is obtained by double scattering. Secondly, the prior art Moiré approach is not applicable to alignment targets since there is only one grating corresponding to the process layer and the prior art approach requires two gratings. Furthermore, the prior art Moiré approach prints one grating on top of another, which is not suitable for measurement of a standard side-by-side grating target.
It is within this context that embodiments of the present invention arise.